Can you have a default value for typedef enum bit[3:0]

SystemVerilog
1

Is there a way to add a default to a typedef enum ? or what will it default to if it not assigned to any of the listed values?

typedef enum bit[3:0]{
OPTION_0 = 4’b0000,
OPTION_1 = 4’b0001,
OPTION_10 = 4’b1111
} OPTION_e;

OPTION_e option_x;
$cast(option_x, 10);

What would happen? and can I add a default?

2

*In reply to GCHAN310:*The default initial value of an enum is either '0 if the base type is a 2-state type, or 'x if the base type is a 4-state type. It does not matter if you have a named value that matches the initial encoding or not.

The only type that allows you to declare a specific default initial value is a struct. So you could wrap your OPTION_e in a struct.

typedef struct {
     OPTION_e x = OPTION_10;
} OPTION_s;

OPTION_s option; // option.x would be set to OPTION_10

A dynamic $cast does allow an enum to be set to an out of range value. You would need to use a static cast.

option.x = OPTION_e'(10);