Can anyone please explain Bit-Slicing used in arrays/vector?

SystemVerilog
1

Hi,

Can anyone please explain Bit-Slicing used in arrays/vector with example?

Thanks,

2

In reply to Chirag Rathod:

This is a very broad question that any basic Verilog tutorial will have many examples of. Section 11.5.1 on the 1800-2012 LRM explains some of the terminology as well. (bit-select and part-select)

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In reply to Chirag Rathod:

As pointed by Dave, it is very broad question. However, if you are interested in slicing with part selection, then refer to this forum discussion.

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In reply to dave_59:

Thanks.

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In reply to sharvil111:

Thanks