How to call UVM phases in top module without using run_test function?
In reply to kulvinderrawat:
If you do not want to call run_test you have to take care that all run tasks are called in the right order. This is a lot of effort you have to spend. I’m not sure that this is your intention.
In reply to chr_sue:
Yes, the intention is same. We need to integrate the BFM (which is developed in UVM) inside SV environment.
In reply to kulvinderrawat:
I don’t know how your BFM looks like, but if it is developed as a UVM device you should be able to integrate this in your testbench.
What do you mean with SV testbench?