Bitwise toggle coverage for a bitvector

SystemVerilog
21

In reply to albert:

class xyz ;
 
bit[31:0] address;
bit[31:0] ADDR;
 
covergroup access();
  addr : coverpoint ADDR { bins Addr[16] = {[0:address]}};  
endgroup
 
function void calc();
  access.sample();
endfunction
 
fucntion new();
  address = 'h10000; 
  access = new();
endfunction
 
task run();
 
 forever begin
    calc();
    ...
end
 
endtask
endclass