Best way to learn systemVerilog

SystemVerilog
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In reply to ben@SystemVerilog.us:

  1. I already work, and in my company they use SystemVerilog for verification.
  2. The question if if there is some guide for systemVerilog which doesn’t assume that I have knoeledge in verilog.
  3. Most of my knowledge in software is in the field of front end (javascript and etc). I never had the chance to work in hardware, and when I got the offer from my company I couldn’t refuse…I have to try, and if not now when?! In my country hardware are not less paying jobs than jobs in software, so it’s ok:)