In reply to uvmsd:
A certain number of clock cycles can be also such an indication.
Following the link from Accellera is not a good coding practice because you are violating the TLM rules. This might also cause additional problems or additional waiting times.
If have never seen this in practice and I have never used this in projects and I’ll never, never recommend this.
You can control in all cases the delay from the driver. The monitor is also not a good idea because the monitor does not have any permission to stop the execution of the DUT. This would result in a loss of data.
If you are doing this in the driver, you do not need any uvm_event. Add to your drivers run_phase (at the end) only the number of clock cycles you have to wait.
Then call item_done and you can retrieve with get_next_item the next seq_item.