Backdoor Register Layer Access

UVM
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4

In reply to Sanjin_Arsenovic:

You are setting some hdl_path and call then clear_hdl_path:

   m_reg_block_p1.configure(.hdl_path("top.dut"));
   m_reg_block_p1.build();
   m_reg_block_p1.cntrl_reg.clear_hdl_path();

I’d recommend you should call add_hdl_path in your register model.
To check whether a hdl path does exist or not you can call uvm_hdl_check_pth.