In reply to Ashmika:
Requirement :
Sig1 will be high for a few numbers of clock cycles. // Number of clocks are unknown
sig2 can only be high for one clock cycle while sig1 is high.
sig2 toggles do not care if sig1 is not high.
property
@(posedge clk)
$rose(sig1) |-> sig2[->1] ##1 !sig2[*1:$] intersect sig1[*1:$];
endproperty