proerty ch_situation(ch_en,ch_situation,trans_start,trans_finish);
@(posedge clk)
$rose(ch_en) |-> ## [0:50] $rose(trans_start) ##0 (ch_situation==1) [*1:$] ##0 (trans_finish==1);
endpropery
generate
for(genvar i = 0; i<ch_number; i++) begin
assert_property(ch_situation(...));
end
endgenerate
I write a assertion for channel situation and channel should be active during the between start and finish time. In the above, code is not stabile. When i run the simulatoin, some of them is failed but sometimes just only channel_1 is failed, sometimes two other channels are failed. All desing features same when i look in the simulation.
bit[0:7] ch_en,ch_situation,trans_start,trans_finish;
let ch_number=8; // or a constent depending on some vector length, or a parameter
generate
for(genvar i = 0; i<ch_number; i++) begin
property pch_situation;
@(posedge clk)
$rose(ch_en[i]) |-> ## [0:50] $rose(trans_start[i]) ##0
(ch_situation[i]==1) [*1:$] ##0 (trans_finish[i]==1);
endproperty
ap_ch_situation: assert property(pch_situation);
end
endgenerate
// or the following
property pch_situation2(ch_en,ch_situation,trans_start,trans_finish);
@(posedge clk)
$rose(ch_en) |-> ## [0:50] $rose(trans_start) ##0
(ch_situation==1) [*1:$] ##0 (trans_finish==1);
endproperty
generate
for(genvar i = 0; i<ch_number; i++) begin
ap_ch_situation2: assert property(pch_situation2(
ch_en[i],ch_situation[i],trans_start[i],trans_finish[i]));
end
endgenerate