Hi,
I wish to compare if the contents written in to the memory are actually matching.
Is there a way to access the verilog memory contents in UVM ?
Regards,
Sam
Hi,
I wish to compare if the contents written in to the memory are actually matching.
Is there a way to access the verilog memory contents in UVM ?
Regards,
Sam
You can use the UVM’s memory model to perform backdoor memory access to compare the memory with the operation that just wrote to it. But you will need to be more specific about what you mean by “matching” since you most likely do not want to duplicate the entire DUT memory in your testbench.