Access DUT internal signals in my_uvm_sequence

[ajitgangad_2]

How to access DUT internal sub-module signals in the my_uvm_sequence ? There is a requirement to poll some internal singal while the test sequence is running . how we can do that ?
Thanks in advance .

[dave_59]

Is it by any chance possible to access a net(internal in DUT) through UVM environment?

I have scenario where I need to tap the value at a net that is internal to the DUT. I have to do so because, after the net is connected to another block within DUT, the output is frequency domain and I have to do some comparisons before that happens. I am not sure if I was able to put this question correctly, but any ideas or a work around will be helpful.