In reply to ben@SystemVerilog.us:
Hi Ben,
In your table,
p1 until p2,
case1:
p1: 11110
p2: 00001
or:
case2:
p1: 11111
p2: 00001
case3:
p1: 11110
p2: 00001
Q1:Do you mean case1 and case2 pass and case 3 fail?
Q2:If I want P2 only reponse p1, it means that p2 can not be 1 unless p1 is active.
How should I do? Thanks a lot!