Using readmemh

SystemVerilog
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1

I have a module that needs to read a config.txt file(18 heaxadecimal values) and then store in a mem variable.Attaching the code I have written below.
There is no data being read and there is no error.

  initial
    begin
      @(posedge AxiReset_N);
      $readmemh("axi_enh_config.mem",mem); //Reading the contents of config file to mem variable
    end

The mem file looks like :

reg [`CONFIG_FILE_BIT_SIZE-1:0] mem [MEM_SIZE]; //Memory variable to save contents of config file. where `CONFIG_FILE_BIT_SIZE = 72
2

is the mem file encoded correctly? With readmemh you can also try giving the start position and end position.

3

In reply to avinash_nambiar:

When yopu say the mem file, do you mean the file called “axi_enh_config.mem”. It’s supposed to be a file of hexadecimal numbers, not a declaration.

4

In reply to avinash_nambiar:

I have a module that needs to read a config.txt file(18 heaxadecimal values) and then store in a mem variable.Attaching the code I have written below.
There is no data being read and there is no error.

  initial
begin
@(posedge AxiReset_N);
$readmemh("axi_enh_config.mem",mem); //Reading the contents of config file to mem variable
end

The mem file looks like :

reg [`CONFIG_FILE_BIT_SIZE-1:0] mem [MEM_SIZE]; //Memory variable to save contents of config file. where `CONFIG_FILE_BIT_SIZE = 72

Add axi_enh_config.mem file here to understand it’s content. Also did you make sure

@(posedge AxiReset_N) is satisfied ?