Need help with these ( Lazy ) Constraints

SystemVerilog
,
1

I have come across following 3 Constraints , which I somehow feel is Lazy way of writing Constraints


 // CODE 1
rand bit [1:0] a , b ;

constraint IMPLI { a -> ( b == 3 ) ; } // EDIT :: LHS 'Operand' means what ??

[a] I am unsure what LHS of implication Constraint mean ?

Similarly if I modify it to ::


// CODE 2
rand bit signed [1:0] a ; //  a is inside {[-2:1]} !!
rand bit [1:0]  b ;

constraint IMPLI { a -> ( b == 3 ) ; } // EDIT :: LHS 'Operand' means what ??

[b] In this case does the LHS mean the same as CODE 1 ? Or are they different


 // CODE 3
rand bit [7:0]  b ;

constraint ITERATN {   
                       foreach(b[i])
                        if ( i ) // Index means what ??
                       {
                         b[i] == 1 ;
                       }
                        else
                       { b[i] == 0 ; }
                   } 




 // CODE 4
rand bit signed [-2:1]  b ; // b has value inside {[-8:7]}

constraint ITERATN {   
                       foreach(b[i])
                        if ( i ) 
                       {
                         b[i] == 1 ; // For which indexes ?
                       }
                        else
                       { b[i] == 0 ; }
                   }

[c]
Similarly in these 2 foreeach Consatrints ( Code 3 && 4 ) what does i indicate when if ( i ) is True ?

2

In reply to TC_2017:

LHS means Left Hand Side, the operand to the left of the operator. For

a -> ( b == 3

The operator is →
The LHS operand is a
The RHS operand is b==3

The implication operator can be re-written as simple Boolean equation:

!a || b==3

!a is the same as a==0;

These rules should answer all your questions.

3

Thanks Dave ,

The IMPLI constraint implies that whenever ( a != 0 ) , b is ALWAYS 3 .


Hence {a,b} combinations like {1,0} , {1,1} , {1,2} , {2,0} , {2,1} , {2,2} , {3,0} , {3,1} , {3,2}

NEVER OCCUR

 ( Out of the 16 possible Combinations )

.

When a is 0 , b can have all 4 values ( 0 - 3 )