Assertion for Connectivity Check

Hello,

I have a Mixed Signal DUT. Some of the Registers in Digital Domain
are connected to some ports of Analog Blocks like PLL, Mixer etc.
There are many such connections. I wanted to use Assertions to check the
connectivity of a Register bit connection to Analog Block input.

Can I use Immediate assertion like
assert (Reg[10] == tb.dut.anblock.mixer.port1) $error(" Connection Error ");

or Concurrent Assertion like below

property con_check
Reg[10] → tb.dut.anblock.mixer.port1;
endproperty

assert property (@posedge clock) con_check;

Thanks
JeffD

In reply to dvuvmsv:
From my SVA book: The immediate assertion statements can be specified anywhere a procedural statement is allowed to be specified; this includes always, always_ff, always_comb, always_latch, initial, final. They can also be specified in functions and tasks, in modules, checkers, programs, and classes.42 The simple immediate assertion statement can be one of the following:
6. assert to specify that the expression holds for the design
7. assume to specify the expression is an assumption for the environment
8. cover to monitor the expression evaluation for coverage
Thus,


always_comb 
 a_port1: assert #0 (Reg[10] == tb.dut.anblock.mixer.port1) 
     else $error(" Connection Error ");
// Note that gate delays may cause false errors if the concerns are really at clock edges. 

// Concurrent assertions are better is you are only concerned about values 
//  being the same at clocking events. 
 apr_port1: assert property (@ (posedge clk) Reg[10] == tb.dut.anblock.mixer.port1) else $error(" Connection Error ");
// No need to declare the property if you are not using local variables or arguments. 
 

Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
For training, consulting, services: contact Home - My cvcblr


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