Could we write cover group for below Specification.
Specification :- (fll_lock):- FLL LOCK is asserted on detecting two positive edges of FLL INC or FLL DEC only when (fll_sar_eoc == 1). and two positive edge of fll_inc or fll_dec (consecutive is not necessary ) between 1 to 6 clock cycle of sampled_clk
I have written one assertion to verify one specification so should we write functional cover group for the same or not ? will it add any extra benefit ?
The tool which i am using is already letting me know which are the assertion is getting triggered or not while generation the functional coverage report.