UVM_SOURCE CODE OF UVM_VOID?

UVM
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1

drilling beautiful UVM i found that uvm_void is the main parent class …!

is the source code of uvm_void is available ?? how to see what is in that is there any link ?

if any please share .

thanks in advance.

2

In reply to Deepak kulkarni:

All of the UVM source code is available. A link is here.

The uvm_void class was put in to make UVM similar to the e language, but is not needed in SystemVerilog.

3

In reply to dave_59:

dave sir,
i have two questions.
1] if any class is extended from uvm_component registration is like “uvm_component_utils(xx)”
and if it is extends from object then “uvm_object_utils(xx)” and also constructor methods are also different for both eventhough grandparent of these two is uvm_object !! so why this
difference is there ?

2] what is base root of super.new(string name,uvm_component parent) and super.new(string name)?? what is in this function (new)? how create methode call new?

4

In reply to Deepak kulkarni:
I’d recommend you are looking to the UVM source code and looking to some of the UVM presentations the Verification Academy is offering.

5

In reply to Deepak kulkarni:
The factory create() method needs to have a fixed constructor prototype because it s just a wrapper around the constructor. The UVM could have been architected with only one factory registration mechanism, but they didn’t do it that way.

Please see my SystemVerilog OOP for UVM course where I review the principles of the factory