Hello guys,
I am developing a uvm_reg_adapter with apb transaction
in the reg2bus function, const ref uvm_reg_bus_op rw.
my doubt is for apb bus we have separate bus for write as well as read data. so how to handle this??
I have written code like below. can someone help me on this
virtual function uvm_sequence_item reg2bus(const ref uvm_reg_bus_op rw);
apb_pkt= apb_packet::type_id::create(“apb_pkt”);
`uvm_info("apb_ral_adapter","Executing Reg2Bus",UVM_HIGH);
`uvm_info("apb_ral_adapter",$psprintf("Got register transaction :addr= %h bit: %h data=%h kind:%h ",rw.addr,rw.n_bits,rw.data,rw.kind),UVM_FULL);
// 32 bit data transfer
if (rw.n_bits > 32)
`uvm_fatal(“apb_ral_adapter”, “Transfer requested with a data width greater than 32bit data width. Please reduce the data size”);
`uvm_info("reg2ahb_adapter", $sformatf("n_bits data = %b log_base_2 n_bits", rw.n_bits), UVM_HIGH);
apb_pkt.apb_trans = (rw.kind == UVM_READ) ? apb_packet::APB_READ : apb_packet::APB_WRITE;
apb_pkt.apb_paddr = rw.addr;
if(rw.kind == UVM_READ)
apb_pkt.apb_prdata = rw.data;
else
apb_pkt.apb_pwdata = rw.data;
return apb_pkt;
endfunction : reg2bus
// apb_packet has the following fields
rand enum {APB_READ,APB_WRITE} apb_trans;
rand bit [31:0] apb_paddr;
rand bit [31:0] apb_pwdata;
rand bit [31:0] apb_prdata;