Uvm flow

Hi in the UVM testbench the run phase of the monitor gets called before the run phase of the driver.
But as per the requirement the run_phase of the driver should get called first and when the driver will drive the pins of the DUT, then after that the run_phase of the monitor should get called so that i can tap the signals from DUT to monitor them.

uvm_info rtl/random_test.sv(19) @ 0: uvm_test_top [INFO] Called my_test::build_phase

UVM_INFO rtl/random_test.sv(24) @ 0: uvm_test_top [INFO] Called my_test::run_phase

UVM_INFO rtl/random_test.sv(33) @ 0: uvm_test_top [INFO] Called my_test::run_phase

UVM_INFO rtl/monitor.sv(25) @ 0: uvm_test_top.env.agent.monitor [INFO] Starting UVM monitor run_phase

UVM_INFO rtl/driver.sv(19) @ 0: uvm_test_top.env.agent.driver [INFO] Called my_driver::run_phase

So, how can the flow be changed so that the run_phase of the driver gets called before the run_phase of the monitor.

In reply to shankar_logic:
The run_phase() of all UVM components get forked off in parallel and it should not matter what order they eventually get executed in. They will be synchronized by a clock anyways.