Usage of uvm_hdl_force in loop

Hi,

I my using uvm_hdl_force(“path”,data) to configure the registers of the design. But the problem is they are large in number so i want to loop them in.

for(int i=0; i<8; i++) begin

for(int j=0; j<8; j++) begin

uvm_hdl_force(“DUt.abc.pkt.reg_0.w[1]” , data);

end

end

I want to replace 0 with i and 1 with j . Is their a simple way to do it.

In reply to sraja:

Use $sformatf LRM section 21.3.3 Formatting data to a string to create the string with the correct hdl path, btw I recommend to first check if the path exists or if the force was successful

for(int i=0; i<8; i++) begin

for(int j=0; j<8; j++) begin

uvm_hdl_force($sformatf("DUt.abc.pkt.reg_%0d.w[%0d]",i,j) , data);

end

end

HTH,

-R