Should env's be reused in UVM from block to subsystem to soc/chip level?

UVM
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1> Should the block level env be reused at Subsystem level and than subsystem envs at top level/chip level ?
2> If I assume reuse at next levels as mention above is possible (Which I believe personally is the way),This means that some of connections may not be applicable at next level or higher level which are present in env.connect method. Shall this connection be done in base test case ?

– Jigar

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In reply to jjpatel:

  1. Yes, it is common to re-use block-level environments for a higher-level environment.
  2. All connections at a block-level should still be valid for a higher-level environment. What type of connections do you think should not be applicable?
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In reply to jjpatel:

1> Should the block level env be reused at Subsystem level and than subsystem envs at top level/chip level ?
2> If I assume reuse at next levels as mention above is possible (Which I believe personally is the way),This means that some of connections may not be applicable at next level or higher level which are present in env.connect method. Shall this connection be done in base test case ?

I believe there are 2 different appraoches:
(1) reusing agents
(2) reusing sub-envs

You should not mix both approaches. Follow your line.