Scoreboard design for packets arriving OOO from the DUT

UVM
1

Scoreboard design for the following requirement:

  1. Packets coming in to DUT (addr/data/enable) come out Out of order, but the packets with same addr should come out in order.
  2. And also when enable =1 in the incoming packet, all the previous packets with enable =0, should come out before the packet with enable =1 comes out from the DUT. How do we design this in the scoreboard?


typedef txn txn_q[$];

txn_q hash[bit[31:0]]; // hashmap with addr as key, so that packet with same addr can be checked coming out in order

1 can be solved by above hashmap .

How to solve 2.?

any inputs ?
2

In reply to n347:
Looks like the ‘enable’ is a data memebr of your transaction. It is very unusual to have control signals as data memebers in your transaction and it makes the functionality complicated as you are describing.
The enable functionality should be implemented in the monitor when extractin the transactions.

Another remark. What is the intention of this piece of code:

typedef txn txn_q[$];
txn_q hash[bit[31:0]];

It could be simply a variable declaration like this:

txn txn_q[$];

But I believ you need something different. When you want to use the addr as a key you need an associative array like this:

txn txn_aa[int];
3

In reply to chr_sue:

Thanks!

I wanted to create a queue of associative array for a particular address. There can be many packets from a particular address , they should be in order.

txn txn_aa[int] → this will just be 1 txn per address

4

In reply to n347:
I see, but looks quite complicated. Could you do the compare somewhere else?
A few years ago I had a DDR4 UVM testbench. I did the compare in the sequence using an associative array. Would this be an option?

5

In reply to chr_sue:

Can you provide an example?

How would you do the check in the sequence?

  1. Packets coming in to DUT (addr/data/enable) come out Out of order, but the packets with same addr should come out in order.

The above check has to be performed in the scoreboard, right, which gets packets from inputs and output monitors…

6

In reply to n347:

What I was saying is you can do the compare in the sequence itself and not in the scoreboard.
For reading you are sending back responses from the driver to the sequence. This allows you to compare the written data (stored in an assiciative array) with the read data, coming back from the driver to the sequence.
Do you have really out-of-order data or is it pipelined data?

This is a code snippet:

logic [7:0] compare_a [string];  // declaring an associative array

in a loop write to registers

data_regs[i].write(status, item.data, .parent(this));  //wriet to the register
compare_a[data_regs[i].get_name()] = item.data;        // store the written data in the associatve array

in a loo read the data

data_regs[i].read(status, rd_data, .parent(this));

and compare with the written data:

compare_a[data_regs[i].get_name()] == rd_data;