Phases to avoid in UVM

Hi All,

Are there any phases, which can be avoided in UVM or all phases defined are compulsory?

In reply to kmishra:

Technically, you could write “UVM” code without using any phases. But most competent verification engineers can get by just using the build , connect, and run_phases

In reply to dave_59:

In reply to kmishra:
Technically, you could write “UVM” code without using any phases. But most competent verification engineers can get by just using the build , connect, and run_phases

Will it help in reducing simulation time?

In reply to kmishra:

Not really. The UVM calls every virtual method *_phase for every umm_component in your design.

Using too many phases makes your code harder to read and maintain. And potentially harder to integrate with code written by others.

In reply to dave_59:

In reply to kmishra:
Not really. The UVM calls every virtual method *_phase for every umm_component in your design.
Using too many phases makes your code harder to read and maintain. And potentially harder to integrate with code written by others.

Thanks much Dave.