Permit_unmatched_virtual_intf

Questasim presents the following error:
Fatal: (vsim-8451) ./…/verif/tb/…/agents/adc_dac_agents/adc_dac_driver.svh(33): Virtual interface resolution cannot find a matching instance for ‘virtual adc_dac_interface #(12)’

The code that I feel is involved in creating this error follows:

agents/adc_dac_agents/adc_dac_interface.sv:
interface adc_dac_interface#(DW=12)(input bit clk, resetn);

tests/adc_dac/demod/demod_test_base.sv:
virtual adc_dac_interface#(DW) adc_dac_if;
if(!uvm_config_db# (virtual adc_dac_interface#(DW))::get(null,“”, “adc_dac_if”, adc_dac_if))

tb/demod_tb.sv: // This is the top module
adc_dac_interface#(DW) adc_dac_if(clk1, resetn);
From the build_phase :
uvm_config_db#(virtual adc_dac_interface#(12))::set(null, “*”, “adc_dac_if”, adc_dac_if );

agents/adc_dac_agents/adc_dac_driver.svh:
virtual adc_dac_interface#(DW) adc_dac_if;
From the build_phase:
if(!uvm_config_db# (virtual adc_dac_interface#(DW))::get(this,“”, “adc_dac_if”, adc_dac_if))

Found suggestion on Virtual interface resolution cannot find a matching instance of interface | Verification Academy
For these cases, an option was added to vsim to avoid this error: permit_unmatched_virtual_intf.
So added to vsim cmd line:
vsim tb_opt -lib work_tb -permit_unmatched_virtual_intf -L unisims_ver -L unifast_ver -L unimacro_ver -L secureip -L simprims_ver -L unisim -L work_rtl -L work_ip “+UVM_TESTNAME=demod_test_sin” –classdebug

That just changed the words of error:
Fatal: … Illegal virtual interface dereference

Please advise

In reply to vonleewolff:

Does #(DW) evaluate to #(12) in all cases?

In reply to dave_59:

Yes. Since sending this out, I tried changing file demod_tb.sv:
uvm_config_db#(virtual adc_dac_interface#(12))::set(null, “", “adc_dac_if”, adc_dac_if
to:
uvm_config_db#(virtual adc_dac_interface#(12))::set(null, "
”, “adc_dac_if”, adc_dac_if

Here is what a grep of the file reports now:
grep -r adc_dac_if * | grep 12 | grep -v bac | grep -v transcript | grep -v log | grep -v Bin | grep -v work | more

agents/adc_dac_agents/adc_dac_driver.svh: virtual adc_dac_interface#(DW) adc_dac_if;
agents/adc_dac_agents/adc_dac_driver.svh: if(!uvm_config_db# (virtual adc_dac_interface#(DW))::get(this,“”, “adc_dac_if”, adc_dac_if))
tb/demod_tb.sv: adc_dac_interface#(DW) adc_dac_if(clk1, resetn);
tb/demod_tb.sv: uvm_config_db#(virtual adc_dac_interface#(DW))::set(null, “*”, “adc_dac_if”, adc_dac_if );
tests/adc_dac/demod/demod_test_base.sv: virtual adc_dac_interface#(DW) adc_dac_if;
tests/adc_dac/demod/demod_test_base.sv: if(!uvm_config_db# (virtual adc_dac_interface#(DW))::get(null,“”, “adc_dac_if”, adc_dac_if))

In reply to vonleewolff:
You still have not shown how DW gets the value 12 in the lines:

 tb/demod_tb.sv: adc_dac_interface#(DW) adc_dac_if(clk1, resetn);

or any remaining code where you are using adc_dac_interface#(DW)

In reply to dave_59:

class demod_test_base#(parameter DW = 12) extends uvm_test ;

In reply to vonleewolff:

In your top-level testbench where does DW get its value when you instantiate the actual interface in

 tb/demod_tb.sv: adc_dac_interface#(DW) adc_dac_if(clk1, resetn);

In reply to dave_59:

module demod_tb();
reg clk1=0;
reg resetn=1;
parameter DW = 12;
adc_dac_interface#(DW) adc_dac_if(clk1, resetn);

In reply to vonleewolff:

If you are telling me that every reference to adc_dac_interface is either

adc_dac_interface#(12)

or

adc_dac_interface#(DW) where DW is always set to 12

Then I can’t see why you are getting this error. But you may not have shown all the code or scripts that might be relevant. I would contact your local support team for help where you would be able to share more information than practical in this forum.