Need of parameterization in UVM

UVM
,
1

I have observed that the extended UVM classes are often parameterized.
For example, user defined driver class.
What is the advantage of parameterizing user defined classes?
How does it affect the UVM code?

2

In reply to bachan21:
https://www.edn.com/design-patterns-in-systemverilog-oop-for-uvm-verification/