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  • Multiple TLM port to import connections

Multiple TLM port to import connections

UVM 5517
TLM multiple connect... 1
stanley_sam
stanley_sam
Full Access
6 posts
November 25, 2020 at 9:15 am

Hi there,
My objective:
comp[0].port.connect(comp.ch0_imp);
comp[1].port.connect(comp.ch1_imp);
..
comp[7].port.connect(comp.ch'n'_imp);

I can use loop for comp[i], but how to pass the connect parameter??
foreach(component[i])
comp[i].port.connect(comp.ch??_imp);

Thanks.

Replies

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chr_sue
chr_sue
Full Access
3213 posts
November 25, 2020 at 9:46 am

In reply to stanley_sam:

Asking back that I understood right: You have N components and want to connect theit analysis ports with 1 component having N imports?
Is this correct?

stanley_sam
stanley_sam
Full Access
6 posts
November 26, 2020 at 2:03 am

In reply to chr_sue:

Yes.
To be clear,How should I pass the parameter to connect function so that I just need to declare it once and use for loop from i=0 to i=7.

ABD_91
ABD_91
Forum Access
69 posts
November 26, 2020 at 10:28 am

In reply to stanley_sam:

As per your current code you have a component "comp" with N different imps like ch0_imp . ch1_imp etc .

Change these to an unpacked array of imp .

 // Within comp
   uvm_*_imp ch_imp[ 8 ] ;

So now within the parent component you can use only one Variable 'i'

  foreach ( comp[ i] ) 
   comp[i].connect( comp.ch_imp[ i ] ) ;
stanley_sam
stanley_sam
Full Access
6 posts
November 26, 2020 at 12:43 pm

In reply to ABD_91:

Sorry ABD-91, but...
As per my understanding, we use uvm-analysis-imp-decl macro to define multiple imports in single component as we neeed to define different import function so this approach won't work i suppose.

chr_sue
chr_sue
Full Access
3213 posts
November 26, 2020 at 1:07 pm

In reply to stanley_sam:

I could imagine to use a 'generate' for creating the implementation objects and the connections.

stanley_sam
stanley_sam
Full Access
6 posts
November 26, 2020 at 9:05 pm

In reply to chr_sue:

Hi chr-sue,
I have used this generate for connecting design signals to inteface but, how can we use this in my current scenario? Can you please give an example that who can we pass different import declarations in connect function using generate?

chr_sue
chr_sue
Full Access
3213 posts
November 30, 2020 at 8:29 am

In reply to stanley_sam:

I did not get this running with generate, but it works with simple for-loops.
In the connect_phase I do
for (int i = 0; i < 8; i++)
mc[i].ap.connect(tc.ae[i]);

ap is an anylysis_port and ae[i] is the analysis_export/imp.

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