Hi,
I have a register RO Register1= 32’h00000004 that I should check at the begining of simulation (if I have an execute access the read value is zero)
I send a read transaction of it and I set a post_predict() callback class, but the checker of register failed since the callback
class is called after the checker.
Ibelieved that in Read phase, I should call the pre_read() callback class to be sure that it will be called before the checker
of register.
can you help me to have an example how to set this task pre_read() ?
best regards
this is my trial :
class hardwired_ip_reg_cbs extends ip_base_callback;
`uvm_object_utils(hardwired_ip_reg_cbs)
bit check_enable;
function new(string name = "hardwired_ip_reg_cbs");
super.new(name);
endfunction: new
virtual task pre_read (uvm_reg_item rw);
if (rw.path == UVM_FRONTDOOR)
begin
foreach(rw.value[i]) rw.value[i] = 0;
end
endtask : pre_read
virtual function void post_predict(
input uvm_reg_field fld,
input uvm_reg_data_t previous,
inout uvm_reg_data_t value,
input uvm_predict_e kind,
input uvm_path_e path,
input uvm_reg_map map
);
ral_block_ip blk;
string name = fld.get_name();
uvm_reg rg = fld.get_parent();
string rg_name = rg.get_name();
bit hexecute_access;
$cast(blk, rg.get_parent());
if (kind == UVM_PREDICT_READ) begin
if(hexecute_access == 1) begin
value = 0;
end
end
endfunction: post_predict
endclass: hardwired_ip_reg_cbs