How to Read/write from/to an address using UVM RAL where register does not exist?

UVM
,
1

As a part of error test, I want to write to regions in address map where register does not exist. How do I write or read from such location in address map where register does not exit?

2

In reply to superUVM:

You can use the get_registers() method of uvm_reg_map to get a list of registers. Then iterate over that list calling list_regs[i].get_address() and push each each address onto a list(queue) of addresses. Finally, you can write a constraint asking for an address not inside that list of addresses.
{! (address inside {list_of_addresses});}

3

In reply to dave_59:
Can you please provide a pseudo code?

4

In reply to superUVM:

uvm_reg list_regs[$];
uvm_reg_addr_t address, list_addrs[$];


regmodel.get_registers(list_regs);
foreach(list_regs[i]) list_addr.push_back(list_regs[i].get_address());
assert(randomize(address) with {! (address inside {list_of_addrs});});
5

In reply to dave_59:

Hi Dave,

I’m currently trying to do the same that this post is asking - accessing random register address where the register does not exist as part of an error test. However, I’m not too sure where the pseudo that you’ve provided should go?

I’m guessing I will need to add a new register into the Register Model (let’s call it random_address_reg), and put the pseudo code you’ve provided in the RAL Adapter reg2bus() method? So that whenever random_address_reg is accessed, I then randomise the address and replace the rw.address with the randomised address?

So instead of having:

apb.addr = rw.addr;

I should do:

apb.addr = address;

Not sure if this is what you meant but I would be grateful if you could clarify further please?

Also, in this case, the randomised address will be used in the bus2reg() method and since there is no register at this address in the Register Model, would the Register Model give any errors or would it just ignore the data?

Kind regards,
Po

6

In reply to Po:

That code was supposed to go in a sequence do a direct write and not inside the reg2bus (i.e. a non RAL bus access). I supposed you could create a random_address_reg giving it an out of range address, but that seems to be more bother than its worth.

7

In reply to dave_59:

In reply to Po:
That code was supposed to go in a sequence do a direct write and not inside the reg2bus (i.e. a non RAL bus access). I supposed you could create a random_address_reg giving it an out of range address, but that seems to be more bother than its worth.

Hi Dave,
Register sequences use register_name.write(…) method. How do we write to addresses where register does not exist, as we do not have register_name for those addresses? i.e how do we use ral write method to write to addresses where registers do not exist?

8

In reply to superUVM:
Use a register name which does not exist as a register. Tis is equivalent to what you want to do.

9

In reply to chr_sue:

In reply to superUVM:
Use a register name which does not exist as a register. Tis is equivalent to what you want to do.

Hi,
Would not his cause,

  1. Null pointer or UVM_OK will fail,
  2. Do you expect write transaction to go on bus and eventually hardware will report error?
  3. How do you associate address to register? Should this register{s} be defined in reg model which are not existent in hardware?

Can you please clarify?

Thanks

10

In reply to superUVM:

If you do not check a register is existing it will do the access resulting in an error message.
RAL is hiding the address and using the register name instead.