How to match a testcase name pattern in virtual seq_lib

UVM
,
1

For a particular testgroup (common naming) want to match testname with a regexp eg: “test_mine_.*.sv” and decide to drive a signal or not.

===================== sample code below ============================
ifndef __VIRTUAL_SEQ_LIB define __VIRTUAL_SEQ_LIB
////////////////////////////////////////////////////////////////////////////////
///////////////// BASE VIRTUAL SEQUENCE ////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
typedef class reset_sequence;

class base_virtual_sequence extends uvm_sequence;
uvm_object_utils(base_virtual_sequence) uvm_declare_p_sequencer(virtual_sequencer)
reset_sequence reset_seq;

function new (string name = “base_virtual_sequence”);
super.new(name);
endfunction : new

virtual task pre_body();
if (starting_phase!=null) begin
`uvm_info(get_type_name(), $sformatf(“%s pre_body() raising %s objection”, get_sequence_path(), starting_phase.get_name()), UVM_MEDIUM);
starting_phase.raise_objection(this);
end
endtask

virtual task body();
`uvm_do_with(reset_seq,{…}
…
endtask

…
class reset_sequence extends uvm_sequence;
…
`uvm_do_on(drive_siga, p_sequencer.a1_seqr)
…
endclass
=========================================== END ====================

In the above class reset_sequence defined in virtual_seq_lib, i would like to check the testcase name/pattern and decide on the next uvm_do part.
Pls let me know if it can be done.

Thanks & regards,
Arun