I’m trying to execute a sequence in a very simple way.
`include "uvm_macros.svh"
import uvm_pkg::*;
//-------------------------------------------------------------------------
// www.verificationguide.com
//-------------------------------------------------------------------------
class mem_seq_item extends uvm_sequence_item;
//Control Information
rand bit [3:0] addr;
rand bit wr_en;
rand bit rd_en;
//Payload Information
rand bit [7:0] wdata;
//Analysis Information
bit [7:0] rdata;
//::TODO:: comment the any of the `uvm_field_* macro and observe the output of methods. i.e o/p of print(), copy(), compare() etc
//Utility and Field macros,
`uvm_object_utils_begin(mem_seq_item)
`uvm_field_int(addr,UVM_ALL_ON)
`uvm_field_int(wr_en,UVM_ALL_ON)
`uvm_field_int(rd_en,UVM_ALL_ON)
`uvm_field_int(wdata,UVM_ALL_ON)
`uvm_object_utils_end
//Constructor
function new(string name = "mem_seq_item");
super.new(name);
endfunction
//constaint, to generate any one among write and read
constraint wr_rd_c { wr_en != rd_en; };
endclass
class mem_base_seq extends uvm_sequence#(mem_seq_item);
// Required macro for sequences automation
`uvm_object_utils(mem_base_seq)
// Constructor
function new(string name="mem_base_seq");
super.new(name);
endfunction
task pre_body();
uvm_phase phase;
phase = starting_phase;
if (phase != null) begin
phase.raise_objection(this, get_type_name());
`uvm_info(get_type_name(), "raise objection", UVM_MEDIUM)
end
endtask : pre_body
task post_body();
uvm_phase phase;
phase = starting_phase;
if (phase != null) begin
phase.drop_objection(this, get_type_name());
`uvm_info(get_type_name(), "drop objection", UVM_MEDIUM)
end
endtask : post_body
endclass
//-------------------------------------------------------------------------
//Simple TestBench to create and randomize sequence item
//-------------------------------------------------------------------------
module seq_item_tb;
//instance
mem_base_seq seq_item;
initial begin
//create method
seq_item = mem_base_seq::type_id::create();
//randomizing the seq_item
seq_item.randomize();
//printing the seq_item
seq_item.print();
end
endmodule
To see the just simple properties of sequence and sequence_item I implemented as above.
But I got nothing as the below
----------------------------------------
Name Type Size Value
----------------------------------------
mem_base_seq mem_base_seq - @2512
req object - <null>
rsp object - <null>
----------------------------------------
xmsim: *W,RNQUIE: Simulation is complete.
I expected that print with sequence and sequence_item also.
Could you guide me how I can execute a sequence in a very simple way to see the properties ?