Hi All,
I would like to create mulitple slave agents for mulitple slaves that would be in place.
Approach is single master and multiple slaves in I2C.
Could you please share a small code snippet which demonstrates this.
I am just thinking how to create multiple instances of agents and then master should pickup slave based on the slave address/ID.
any small code snippet can help to proceed.
Thanks in advance.
In reply to Rakesh_VLSI:
You could do it like this:
`define NO_SL 5 // macro for defining the number of slaves. Should be defined in the test
class my_environment extends uvm_env;
`uvm_component_utils(my_environment)
my_master_agent h_master_agent;
my_slave_agent h_slave_agent[`NO_SL - 1:0];
my_scoreboard h_scoreboard;
function new(string name ="my_environment",uvm_component parent);
super.new(name,parent);
endfunction
function void build_phase(uvm_phase phase);
`uvm_info(get_type_name(),"ENVIRONMENT_BUILD_PHASE",UVM_HIGH)
h_master_agent = my_master_agent::type_id::create("h_master_agent",this);
for (int i = 0; i < `NO_SL; i++)
h_slave_agent[i] = my_slave_agent::type_id::create($sformatf("h_slave_agent[%0d]", i), this);
h_scoreboard = my_scoreboard::type_id::create("h_scoreboard",this);
endfunction
....
endclass
The connect_phase should be accordingly.