Hi all, I have some trouble in creating uvm sequence. To be clear, when invoking macro `uvm_do_with.
my own sequence is defined as follow:
class pke_base_sequence extends uvm_sequence #(pke_xaction)
…
bit [4095:0] x;
bit [4095:0] y;
…
task body();
//raise obecttion here
…
//randomize x & y and other variables
…
repeat(item_count) begin
`uvm_do_with(req, {
foreach(MOD_X[i]) MOD_X[i] == x[32*i+:32];
foreach(MOD_Y[i]) MOD_Y[i] == y[32*i+:32];
}
);
end
//drop obection here
endtask
The above sequence is configured in testcase build phase, which is as below:
`uvm_config_db#(uvm_object_wrapper)::set(this, "env.i_agt.sqr.main_phase", "default_sequence", pke_base_sequence::get_type());
my own sequence item is defined as follow:
class pke_xaction extends uvm_sequence_item
…
rand bit [31:0] MOD_X[$];
rand bit [31:0] MOD_Y[$];
…
`uvm_object_utils_begin(pke_xaction)
…
`uvm_field_queue_int(MOD_X, UVM_ALL_ON)
`uvm_field_queue_int(MOD_Y, UVM_ALL_ON)
…
`uvm_object_utils_end
When I compile the entire verification environment and the testcase that starts this sequence, the following error issued:
Error-[ISBENUM]Illegal select base
…/seq/pke_base_sequence.sv, 170
“MOD_X[i]
The base of this select or part-select expression is enum type.
Base source info:”…/seq/pke_base_sequence.sv”,170:(MOD_X[i] ==
this.x[(32*
vcs_paramclassrepository::_vcs_unit_2976068718_pke_base_sequence_1_0::body.unnamed$$_0.unamed$$_vcs_4.unamed$$_2.i)+:32]);
Illegal to use enum type as base of selects.
Error-[ISBENUM]Illegal select base
…/seq/pke_base_sequence.sv, 170
“MOD_Y[i]
The base of this select or part-select expression is enum type.
Base source info:”…/seq/pke_base_sequence.sv”,170:(MOD_Y[i] ==
this.y[(32*
vcs_paramclassrepository::_vcs_unit_2976068718_pke_base_sequence_1_0::body.unnamed$$_0.unamed$$_vcs_4.unamed$$_2.i)+:32]);
Illegal to use enum type as base of selects.
It seems that both MOD_X and MOD_Y is treated as enumeration type variables in the ‘req’ class.
I try the following method which works:
class pke_base_sequence extends uvm_sequence #(pke_xaction)
…
bit [4095:0] x;
bit [4095:0] y;
pke_xaction pkt;
…
task body();
//raise obecttion here
…
//randomize x & y and other variables
…
repeat(item_count) begin
`uvm_do_with(pkt, {
foreach(MOD_X[i]) MOD_X[i] == x[32*i+:32];
foreach(MOD_Y[i]) MOD_Y[i] == y[32*i+:32];
}
);
end
//drop obection here
endtask
But I still don’t know why the variable ‘req’ can not be treated equally as pkt.
Can anyone help me? Thanks in advance.