I am trying to use uvm_hdl_read from inside a "test" file which is within a "package" file. But UVM doesn't seem to like it and it's giving me this error:
ncvlog: *E,ILLHIN (../tests/reg_test_pkg.sv,165|51): illegal location for a hierarchical name (in a package).
So I changed the hierarchical reference of the actual top to "uvm_top". But UVM threw another error:
ncvlog: *E,NOTCLM (../tests/reg_test_pkg.sv,165|32): wrap is not a class item.
*here "wrap" is the instance name of my DUT in TOP.
Is there a way around this so I can "read" the hdl signal or port value from a testcase that is inside a package.