Writing SVA sequence involving a bus

SystemVerilog
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11

In reply to ben@SystemVerilog.us:

Ben,

could you please help me understand a bit more on your comments…

(my_bus===0) |=> (!($fell(my_bus[i])[->1]) intersect q_all_rose);

  1. Too many not needed attempts when my_bus==0 for many cycles. That is why I had the “go” variable that fired once. … I agree with your statement!
  2. !sequence is illegal … in general is it okay to use a “not” operator, like, not(sequence). I know “not” is a property operator and not a sequence operator
  3. (!$fell[i][->1] is not what you want … I agree… consecutive repetition might have worked

can you also comment on these (I have not written the antecedent part of implication operator)
a) (!$fell[i] throughout q_all_rose))
b) ((fell[i] == 0)[*0:] intersect q_all_rose)

Thanks
Pavan