Writing randomized data in a uvm_reg test

UVM
,
4 
 foreach(registers[i]) begin
      if ((uvm_resource_db#(bit)::get_by_name({"REG::",registers[i].get_full_name()},"NO_REG_TESTS", 0) != null) || (uvm_resource_db#(bit)::get_by_name({"REG::",registers[i].get_full_name()},"NO_REG_ACCESS_TEST", 0) != null )) begin
      `uvm_info(get_type_name(), $psprintf("NO_REG_TESTS is defined for this register=%0h so ignore R/WR",registers[i]), UVM_LOW);
      end
      else begin 
      $display("Inside Wie_ral_basic_access_sequence RAL write function");
      `uvm_info("Write function","Inside Wie_ral_basic_access_sequence RAL write function", UVM_LOW);
        wr_data=$random;
        registers[i].write(status, wr_data, .parent(this));
      end
    end

I am trying like this but regiter size is not increasing and not going inside else part so write is not happening.

I am getting like this info/display in log file

regmodel size : 0
UVM_INFO /nfs/iind/disks/ba_WIE_fe_ver_disk01/aavvarux/wie_verif_29AUG/verif/wie_tb/env/sequences/ral_sequences/wie_ral_basic_access_sequence.sv(65) @ 1033000000: reporter@@reg_seq [get_full_name()] RAL registers = '{}

Can anyone help.Thanks in advance…!