In reply to dayalan.natarajan:
Thanks for your reply Abhishek. What you mentioned is true for the connection between and_scoreboard and and_predictor component’s as uvm_tlm_analysis_fifo has inbuilt write function.
But my question is how the write function call from monitor and driver is driving/transmitting the data into Scoreboard.
Thanks for your reply chr_sue.
I am not seeing any error while running my simulation. I have pasted the simulation log below for your reference
UVM_INFO @ 0: reporter [RNTST] Running test seqr_and…
vif assigned
writing to scoreboard
to_scoreboard write called 3
pred act_pkt.y is 0
pred act_pkt.z is 0
pred exp_pkt.y is 0
pred exp_pkt.z is 0
UVM_INFO testbench.sv(80) @ 3: uvm_test_top.and_env0.agent0.scoreboard0.abcd [and_predictor] Dayalan Comparison PASS
UVM_INFO testbench.sv(274) @ 25: uvm_test_top.and_env0.agent0.sequencer0@@seq0 [oneonezero] seq0 wrote : a= x1, b = x1, c = x0** UVM_INFO testbench.sv(542) @ 25: uvm_test_top [seqr_and] second sequence writing to scoreboard to_scoreboard write called 28 pred act_pkt.y is 1 pred act_pkt.z is 0 pred exp_pkt.y is 1 pred exp_pkt.z is 0 **UVM_INFO testbench.sv(80) @ 28: uvm_test_top.and_env0.agent0.scoreboard0.abcd [and_predictor] Dayalan Comparison PASS** **UVM_INFO testbench.sv(196) @ 50: uvm_test_top.and_env0.agent0.sequencer0@@seq1 [all_ones] seq1 wrote : a= x1, b = x1, c = x1
UVM_INFO testbench.sv(544) @ 60: uvm_test_top [seqr_and] all sequence done
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_objection.svh(1270) @ 60: reporter [TEST_DONE] ‘run’ phase is ready to proceed to the ‘extract’ phase
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_report_server.svh(847) @ 60: reporter [UVM/REPORT/SERVER]
— UVM Report Summary —
** Report counts by severity
UVM_INFO : 9
UVM_WARNING : 18
UVM_ERROR : 0
UVM_FATAL : 0
** Report counts by id
[RNTST] 1
[TEST_DONE] 1
[TPRGED] 18
[UVM/RELNOTES] 1
[all_ones] 1
[and_predictor] 2
[oneonezero] 1
[seqr_and] 2
$finish called from file “/apps/vcsmx/etc/uvm-1.2/src/base/uvm_root.svh”, line 527.
$finish at simulation time 60
V C S S i m u l a t i o n R e p o r t
Time: 60 ns
CPU Time: 0.360 seconds; Data structure size: 0.2Mb
Fri Apr 8 07:35:40 2016
Done