In reply to vk7715:
In reply to dave_59:
Hi Dave, so to clarify, if I have something like this
module xyz_tb_top();
reg i_local;
reg i_flop;
task abc(input reg i);
i_local = i;
endtask
always @(posedge clk)
begin
i_flop <= i_local;
end
endmodule
Should I use non blocking when assigning i_local to i to avoid race conditions? Because if I use blocking assignment, I see i_flop changing the same cycle as i_local. Is this the race condition you are talking about? Please let me know.
I frequently see similar code in UVM environment, a sequence use blocking assignment to set i_local, then pass to driver to assign with non-blocking assignment. Why it’s not a problem for UVM?