Why does Simulation hang in following code

UVM
,
3

In reply to dave_59:

Hi Dave ,

**Could you elaborate on “you have recursive Consumer object construction” .
**
Via my own abd_pkg [ Useful for Debugging purposes :) ] I see that ::

uvm_test_top.cons.child.put_imp
uvm_test_top.cons.child.child.put_imp
uvm_test_top.cons.child.child.childput_imp
…
Goes on being created ( Hence the Simulation Hang !! )


The intent behind the code was to see apart from typical 'this' ( in 2nd argument while calling new() of imp-port ) what if I delegate the component implementing the interface ( put() method ) to an extended type ( Consumer_child in my original code ) .

Here’s the code of blocking_put_imp class ::



class uvm_blocking_put_imp #(type T=int, type IMP=int) extends uvm_port_base #(uvm_tlm_if_base #(T,T) ) ;
  local IMP m_imp; 
  function new (string name, IMP imp); 
    super.new (name, imp, UVM_IMPLEMENTATION, 1, 1); 
    m_imp = imp ; 
    m_if_mask = MASK ; 
  endfunction 
 `UVM_BLOCKING_PUT_IMP (m_imp, T, t)
endclass

So what leads to the simulation hanging ? Essentially 2nd arg. does is


m_imp = imp ;

Which is equivalent to assigning a base class handle to extended class object .