Which registers sequences/tests should we run for verifying completely registers functionality?

UVM
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13

In reply to chr_sue:

This means that is gonna work only in case of 1 word hole, instead sometimes you could have pages or even randomly distributed holes (more than 1 word in between) and this approach will not detect all of them, in this case I recommend using:


uvm_reg regs[$];
uvm_default_map.get_registers(regs);

// we loop through all the possible addresses in an address space
for(uvm_reg_addr_t at == BASE_ADDR; at <= END_ADDR; at+=INCREMENT) begin
   // we could use uvm_default_map.get_reg_by_offset(at);
   // alternatively we can leverage the map regs got before using a custom find register
   if(findreg(at) == null)
     // This is a hole
     // ....
     // then we issue the TRX using protocol sequences
end

sometimes in the bulk/json/rdl (whatever is used to describe the registers in IP) new registers are added at the bottom to avoid FW changing heavily. Having said that this will work assuming the RTL register wrapper logic doesn’t give you back an error in case of HOLE rd/wr/ if so an error would be checked in the code.