In reply to Reuben:
This is what’s happening…
UVM_INFO [uvm_reg_bit_bash_seq] Verifying bits in register reg_model.memmap0.MODE_SET1 in map “reg_model.memmap0.default_map”…
UVM_INFO [uvm_reg_bit_bash_seq] …Bashing RW bit#0
UVM_INFO [uvm_reg_map] Writing 'h1 at 'h0 via map “reg_model.memmap0.default_map”…
UVM_INFO [spi_reg_adapter] reg2bus:
direction = 'h0 // WRITE
addr = 8’h0
data = 8’h1
read_data = 16’h0xxxx // This is for read
UVM_INFO [spi_reg_adapter] bus2reg:
direction = 'h0 // WRITE
addr = 8’h0
data = 8’h1
read_data = 16’hE00 // This is for read
UVM_INFO [REG_PREDICT] Observed WRITE transaction to register reg_model.memmap0.MODE_SET1: value='h1 : updated value = 'h1
UVM_INFO [spi_reg_adapter] bus2reg:
direction = 'h0 // WRITE
addr = 8’h0
data = 8’h1
read_data = 16’h0xxxx
UVM_INFO [uvm_reg_map] Wrote 'h1 at 'h0 via map “reg_model.memmap0.default_map”: UVM_IS_OK…
UVM_INFO [RegModel] Wrote register via map reg_model.memmap0.default_map: reg_model.memmap0.MODE_SET1=0x1
UVM_INFO [uvm_reg_map] Reading address 'h0 via map “reg_model.memmap0.default_map”…
UVM_INFO [spi_reg_adapter] reg2bus:
direction = 'h1 // READ
addr = 8’h0
data = 8’h0
read_data = 16’h0xxxx
UVM_INFO [spi_reg_adapter] bus2reg:
direction = 'h1 // READ
addr = 8’h0
data = 8’h0
read_data = 16’h1
UVM_INFO [REG_PREDICT] Observed READ transaction to register reg_model.memmap0.MODE_SET1: value='h1
Then another bus2reg is called here. This is where the read transaction suddenly changes its value.
UVM_INFO [spi_reg_adapter] bus2reg:
direction = 'h1 // READ
addr = 8’h0
data = 8’h0
read_data = 16’h0xxxx // This value has changed from 16’h1 for an unknown reason
UVM_INFO [uvm_reg_map] Read 'h0 at 'h0 via map “reg_model.memmap0.default_map”: UVM_IS_OK…
UVM_INFO [RegModel] Read register via map reg_model.memmap0.MODE_SET1=0
UVM_ERROR [uvm_reg_bit_bash_seq] Writing a 1 in bit #0 of register “reg_model.memmap0.MODE_SET1” with initial value 'h0000 yielded 'h0000 instead of 'h0001
I also checked the waveform and I saw that there’s no problem with the value of register MODE_SET1.