In reply to ben@SystemVerilog.us:
Note: Instead of a counter, you could also use a shift register and $countones to determine the number of counts in the last n bits. Indexing that shift register can also be used for then last n bit or n:m.
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In reply to ben@SystemVerilog.us:
Note: Instead of a counter, you could also use a shift register and $countones to determine the number of counts in the last n bits. Indexing that shift register can also be used for then last n bit or n:m.
Like