Clarify the requirment.
My project communication protocol define two different write/read frame format. And some addr registers support one format and some addr registers support another format in a single register map.
UVM provides extension argument in uvm_reg::write/read. For single register read or write, can attach extension properties in command like below:
map.reg_a.write(status, 16'hxxxx, UVM_FRONTDOOR, .parent(this), **.extension(xxx)**);
map.reg_b.write(status, 16'hxxxx, UVM_FRONTDOOR, .parent(this), **.extension(xxx)**);
The extension argument is used to distinguish two formats for different registers.
Certainly this method is not good since top test writer usually don’t know which register supports one format and which one supports another. We just care about which register need to be set in top level.
And also when use built-in sequence like uvm_reg_bit_bash_seq…, uvm execute the uvm::write/read command internally and the default extension argument is null. So how can we realize the built-in sequence and also attach the right extension argument automatically?
Thanks.