@warnerrs : No warnings are seen from the model when this occurs. To clarify: The predict of the previous read is performed after the next call to write starts, but before the time progresses - so before the write starts on the bus, but after some of the non-time consuming code of the write task has been executed. This is why I think it is a thread execution order issue. Without some form of synchronization similar to the form I suggested above, or by changing the UVM codebase, I can’t see how anything at the user-level could influence the execution order of the threads in the UVM package code.
@chr_sue : The code provided by cuonghl above is part of the UVM package. This is part of the provided test for bit bashing the registers. I currently believe that the code in the UVM package is not robust enough to work for all scenarios when auto_predict is disabled.
Rather than the synchronizing solution I described above, I am now looking at using the factory to swap out the UVM package sequence with an extended the bit-bash sequence that alters the code so that doesn’t care about the thread execution order.