UVM Phase Synchronization

UVM
6

In reply to sharvil111:

Thanks sharvil111 and chr_sue for response.
i used same code as mentioned by you. but not getting expected output. here i am attaching code. please let me know if i misunderstood, i am using VCS tool for compile and run the simulation.

/*****************************************************************************/
class driver extends uvm_component;
`uvm_component_utils(driver)
function new(string name = “driver”,uvm_component parent = null);
super.new(name,parent);
endfunction

task reset_phase(uvm_phase phase);
  phase.raise_objection(this);
  #5;
  $display($time,"\tdriver: reset phase ended");
  phase.drop_objection(this);
endtask

task main_phase(uvm_phase phase);
  phase.raise_objection(this);
  phase.drop_objection(this);
endtask

endclass
/***********************************************************************/
class monitor extends uvm_component;
uvm_phase p;

`uvm_component_utils(monitor)
function new(string name = "monitor",uvm_component parent = null);
  super.new(name,parent);
endfunction

function void build_phase(uvm_phase phase);
  p = phase.find_by_name("main",0);
  if(p == null) $display("P found null");
endfunction

task run_phase(uvm_phase phase);
  phase.raise_objection(this);
  p.wait_for_state(UVM_PHASE_STARTED);
  $display($time,"\tMonitor unblocked");
  phase.drop_objection(this);
endtask

endclass

/**********************************************************************/
class test extends uvm_test;
`uvm_component_utils(test)

function new (string name, uvm_component parent);
  super.new(name, parent);
endfunction

driver drv;
monitor mon;

function void build_phase(uvm_phase phase);
  uvm_config_db#(int)::set(this, "drv", "delay", 10);
  uvm_config_db#(int)::set(this, "mon", "delay", 100);
  
  drv = driver::type_id::create("drv", this);
  mon = monitor::type_id::create("mon", this);
  
endfunction

function void start_of_simulation_phase(uvm_phase phase);
  //this.set_report_verbosity_level_hier(UVM_HIGH);
endfunction

endclass

/*********************************************************************/
module top;

import uvm_pkg::*;

initial
run_test(“test”);

endmodule
/********************************************************************/

/*
Output:-

(Specify +UVM_NO_RELNOTES to turn off this notice)

UVM_INFO @ 0: reporter [RNTST] Running test test…
0 Monitor unblocked
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_objection.svh(1270) @ 0: reporter [TEST_DONE] ‘run’ phase is ready to proceed to the ‘extract’ phase
5 driver: reset phase ended
UVM_INFO /apps/vcsmx/etc/uvm-1.2/src/base/uvm_report_server.svh(847) @ 5: reporter [UVM/REPORT/SERVER]

*/