In reply to juhi_p:
The simulator is explicitly doing what you were implementing. You have the objections in the run_phase of the env. It will be raised at runtime zero. Then it waits #1ß and drops the objection resulting in stopping the simulation (proceeding to extract_phase).
A few remarks with respect to your code:
(1) Using the env run_phase with your content is a bad choice for implementing the objections. Recommended is to implement the objections in the run_phase of the test.
(2) Mixing run_phase and main_phase in a UVM environment is a bad coding style and could result in serious problems.
(3) Transient objects are never constructed in the build_phase of a component. They have to be constructed in the run_phase.
(4) Connecting the virtual interface should be done in the connect_phase and not in the build_phase. This could also result in problems.