In reply to cgales:
I happen to know UVM cannot simulate the testbench on separate threads running parallel to design simulation. Thread refers to each thread of a multicore processor.I also came to know SV does not offer behavioral parallelism.
In reply to cgales:
I happen to know UVM cannot simulate the testbench on separate threads running parallel to design simulation. Thread refers to each thread of a multicore processor.I also came to know SV does not offer behavioral parallelism.