In reply to chr_sue:
Ok let me try again .
There are 5 functional registers reg1…5 (say at addr 'h100…'h500) which needs to be programmed . Now these registers can be programmed in 2 ways .
- First way is direct access from interface A which means we need to launch transaction at adderess 'h100 …'h500 for reg1…reg5 resp . This is normal case , so I skipped this from the question
- Second way is to access indirect from interface B , By indirect I mean these addresses ('h100…'h500) are not accessible directly . To access these registers , we have 2 more registers in this space say index_register ('h12) and data_register ('h16) . If we need to access reg1 , we need to launch 1st transaction for index_register('h12) and write 1 into it and then second transaction to data_register ('h16) with actual data . For writing reg2…reg5 , we need to write 2…5 in index_register . In DUT ,when data_register is accessed , it will see the value of index_register , depending on its value 1…5 it will write the data written to data_register to reg1…reg5 resp .
Few solutions I can think of, help me with any more solution which seems better :
- Now simple solution is to write a task which takes reg_name and interface(map) , and if interface is B , i will launch 2 write transactions (on index_reg and data_reg which will eventually write to desired reg) in that task .
- Other solution is modify the write function of uvm_reg and do this splitting there on the basis of which map is accessed .
- Third possible solution can be indirect_reg , which I am not able to do .
My question is which one is best among 3 and why ? Also if solution 3 can solve the issue , can I have some small code .