UVM End of test

In reply to chr_sue:

Thanks, chr_sue, can you also give me some thought about this theory?
I have read somewhere in the blog due to some delay in the testbench environment’s components sometimes the scoreboard can’t process kinds of stuff and ends up being broken. Except for these very high-level thoughts, I haven’t seen much info about the theory. Can you please share some thoughts about this side too if you think that’s a possibility…? and what is phase_ready_to_end? and when we can you use it?