In reply to sylvainb:
In reply to UVM_LOVE:
You should write in the build_phase of your test:
m_cfg=apb_master_config::type_id::create(“m_cfg”,this);
uvm_config_db #(apb_master_config)::get(this, “”, “apb_master_intf”, m_cfg.apb_if);
After fixing the code as the below
testbench.sv
...
import uvm_pkg::*;
`include "apb_interface.sv"
...
`include "apb_basic_test.sv"
module top;
apb_interface apb_intf();
DUT u_DUT(
.a(apb_intf.paddress), //[9:0]
.b(apb_intf.pwdata), //[31:0]
.c(apb_intf.preaddata) //[31:0]
);
initial
begin
uvm_config_db#(virtual apb_interface)::set(null,"*","apb_master_intf",apb_intf);
run_test("apb_basic_test");
end
endmodule
and apb_basic_test.sv
class apb_basic_test extends uvm_test;
...
`uvm_component_utils_begin(apb_basic_test)
`uvm_component_utils_end
apb_master_config m_cfg;
apb_master_environment apb_environment;//evironment handle
function new(string name="apb_basic_test", uvm_component parent);
super.new(name,parent);
`uvm_info(get_type_name(),"the objection test object has been built",UVM_LOW);
endfunction
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
m_cfg=apb_master_config::type_id::create("m_cfg",this);
uvm_config_db #(apb_master_config)::set(this, "*", "apb_master_config", m_cfg);
uvm_config_db #(virtual interface apb_interface)::get(this, "", "apb_master_intf", m_cfg.apb_if);
apb_environment = apb_master_environment::type_id::create("apb_environment",this);
seq = apb_sequence::type_id::create("seq", this);
endfunction
and this is apb_master_env.sv
class apb_master_environment extends uvm_env;
`uvm_component_utils(apb_master_environment)
apb_master_config m_cfg;
apb_master_agent apb_agent;
apb_scoreboard apb_sb;
function new(string name="apb_master_environment",uvm_component parent);
super.new(name,parent);
endfunction
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
if(!uvm_config_db #(apb_master_config)::get(this, "*", "apb_master_config", m_cfg))
`uvm_fatal("FATAL MSG", "Configuration object is not set properly")
apb_agent=apb_master_agent::type_id::create("apb_agent",this);
if(apb_agent==null)
`uvm_fatal(get_type_name(),"the apb agent has not been built");
apb_sb = apb_scoreboard::type_id::create("apb_sb", this);
if(apb_sb==null)
`uvm_fatal(get_type_name(), "the apb_sb has not been created");
apb_agent.m_cfg = m_cfg;
endfunction
and apb_master_agent.sv
class apb_master_agent extends uvm_agent;
apb_master_config m_cfg;
apb_sequencer sequencer;
apb_master_driver driver;
apb_monitor monitor;
apb_master_coverage coverage;
`uvm_component_utils(apb_master_agent)
function new(string name="apb_master_agent", uvm_component parent);
super.new(name,parent);
endfunction
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
if(!uvm_config_db #(apb_master_config)::get(this, "*", "apb_master_config", m_cfg))
`uvm_fatal("FATAL MSG", "Configuration object is not set properly")
`uvm_info(get_type_name(), $psprintf("agent is: %p", m_cfg.active),UVM_LOW)
`uvm_info(get_type_name(), $psprintf("vif: %p", m_cfg.apb_if), UVM_LOW)
/// Monitor will Always Be Available ///
monitor=apb_monitor::type_id::create("monitor",this);
if(monitor==null)
`uvm_fatal(get_type_name(),"the monitor has not beed built");
/// Driver & Sequencer will be Implemented only in ACTIVE mode
if(m_cfg.active == UVM_ACTIVE) begin
driver=apb_master_driver::type_id::create("driver",this);
sequencer=apb_sequencer::type_id::create("sequencer", this);
if(sequencer==null)
`uvm_fatal(get_type_name(),"the sequecer has not been built");
if(driver==null)
`uvm_fatal(get_type_name(),"the driver has not been built");
and this is the apb_master_agent.sv
``` verilog
class apb_master_agent extends uvm_agent;
apb_master_config m_cfg;
apb_sequencer sequencer;
apb_master_driver driver;
apb_monitor monitor;
apb_master_coverage coverage;
`uvm_component_utils(apb_master_agent)
function new(string name="apb_master_agent", uvm_component parent);
super.new(name,parent);
endfunction
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
if(!uvm_config_db #(apb_master_config)::get(this, "*", "apb_master_config", m_cfg))
`uvm_fatal("FATAL MSG", "Configuration object is not set properly")
`uvm_info(get_type_name(), $psprintf("agent is: %p", m_cfg.active),UVM_LOW)
`uvm_info(get_type_name(), $psprintf("vif: %p", m_cfg.apb_if), UVM_LOW)
/// Monitor will Always Be Available ///
monitor=apb_monitor::type_id::create("monitor",this);
if(monitor==null)
`uvm_fatal(get_type_name(),"the monitor has not beed built");
/// Driver & Sequencer will be Implemented only in ACTIVE mode
if(m_cfg.active == UVM_ACTIVE) begin
driver=apb_master_driver::type_id::create("driver",this);
sequencer=apb_sequencer::type_id::create("sequencer", this);
if(sequencer==null)
`uvm_fatal(get_type_name(),"the sequecer has not been built");
if(driver==null)
`uvm_fatal(get_type_name(),"the driver has not been built");
and this is the apb_master_monitor.sv
class apb_monitor extends uvm_monitor;
`uvm_component_utils(apb_monitor)
virtual apb_interface vapb_intf;
apb_sequence_item apb_rx;
apb_master_config m_cfg;
function new(string name="apb_monitor", uvm_component parent = null);
super.new(name, parent);
endfunction
uvm_analysis_port #(apb_sequence_item) my_mon_port;
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
my_mon_port = new ("my_mon_port", this);
/*
if (! uvm_config_db #(virtual apb_interface) :: get (this, "*", "apb_master_intf", vapb_intf)) begin
`uvm_fatal (get_type_name (), "Monitor Didn't get handle to virtual interface virtualapb_intf")
end
*/
endfunction
virtual function void connect_phase(uvm_phase phase);
super.connect_phase(phase);
if(!uvm_config_db #(apb_master_config)::get(this, "", "apb_master_config", m_cfg))
`uvm_fatal("FATAL MSG", "Configuration object is not set properly")
vapb_intf = m_cfg.apb_if;
`uvm_info(get_type_name(), $psprintf("!!!!!!t is: %p", m_cfg.apb_if),UVM_LOW)
endfunction
virtual task run_phase(uvm_phase phase);
apb_rx = apb_sequence_item::type_id::create("apb_sequence_item");
forever begin
@(posedge vapb_intf.pclk)
After change it as the below
virtual function void build_phase(uvm_phase phase);
uvm_config_int::set(this, "*", "recording_detail", 1);
super.build_phase(phase);
m_cfg=apb_master_config::type_id::create("m_cfg",this);
uvm_config_db #(apb_master_config)::set(this, "*", "apb_master_config", m_cfg);
// uvm_config_db #(apb_master_config)::get(this, "", "apb_master_intf", m_cfg.apb_if);
uvm_config_db #(virtual interface apb_interface)::get(this, "", "apb_master_intf", m_cfg.apb_if);
Simulation is done well . but I am still in doubt what I am correctly implemented as your recommand or not.