Uvm_config_db from bottom to top

UVM
1 

HI All, 

I have one variable named as "shared_var " defined inside monitor. 
I need to set this variable to some value and get it at uvm_test, following is what I have done, but not able to see the value, it is always coming as zero. 
Could you please suggest?

class monitor extends uvm_monitor;
  int shared_var = 24;
  `uvm_component_utils(monitor)
  function new(string name="monitor", uvm_component parent=null);
    super.new(name, parent);
  endfunction
  
  uvm_analysis_port ...
  
  virtual function void build_phase(uvm_phase phase);
    super.build_phase(phase);
    if (!uvm_config_db#(virtual des_if)::get(this, "", "des_vif", vif))
      `uvm_fatal("MON", "Could not get vif")
    mon_analysis_port = new ("mon_analysis_port", this);
    
    uvm_config_db#(int)::set(this, "uvm_test_top.*", "shared_var", shared_var); //opt1
    //uvm_config_db#(int)::set(this,  "*", "shared_var", shared_var); //opt2
   //Note : I have tried opt1 and opt2 also
  endfunction
......
endclass

class base_test extends uvm_test;
  int res_var;
  `uvm_component_utils(base_test)
.....

 virtual function void build_phase(uvm_phase phase);
    super.build_phase(phase);
    
    // Create the environment
    e0 = env::type_id::create("e0", this);
   .....
 uvm_config_db#(int)::get(this, "", "shared_var", res_var);
endfunction : build_phase

virtual task run_phase(uvm_phase phase);
    phase.raise_objection(this);
    apply_reset();
    seq.start(e0.a0.s0);
    #200;
    $display("shared_var %0d", res_var);
    phase.drop_objection(this);
  endtask

//the display of "res_var" is coming as zero, but I was expecting as 24 which was set from monitor. 

Thank you
1 Like
2

The build_phase of your monitor does not execute until after the build_phase of your base_test. You need to execute the uvm_config_db#(int)::get() in a phase after build, but before run. Suggest start_of_simulation.

Also, we suggest using passing a configuration object handle down from the test to the monitor and using that object as a “global” rather than using the config_db for every setting.

3

@dave_59 Thank you for the additional information

4

The issue is that res_var is 0 in base_test because the uvm_config_db set and get paths don’t align, and the monitor’s set happens after the test’s get due to UVM phase ordering. The set path “uvm_test_top.*” doesn’t match the get path “” in base_test, causing the value to be missed. Fix this by adjusting the set path to null, “uvm_test_top” for global access, ensuring get can retrieve the value. Alternatively, use an analysis port to send shared_var from the monitor to the test, avoiding config database issues. This ensures res_var reflects the expected value of 24.